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博士论文

  • 张延军,《面向特定应用的指令集处理器设计方法研究》,2006
  • 马立伟,《专用片上网络设计方法:通信建模、拓扑构造与自动生成》,2006
  • 周志雄,《基于分簇VLIW处理器结构的指令调度技术研究》,2007
  • 殷树娟,《标准数字CMOS工艺低压低功耗ΣΔ模数调制器设计研究》,2009
  • 杨旭,《分簇VLIW处理器结构下低能耗指令调度技术研究》,2009
  • 沈钲,《可配置的并行数字信号处理器体系结构研究》,2009
  • 黎峥,《片上光电通讯:系统级性能与可靠性的分析和设计》,2010


硕士论文

  • 马凤翔,《SoC原型验证系统的研究与开发》,2003
  • 伍球忠,《FIR数字滤波器ASIC实现中的资源优化及HDL代码自动生成》,2004
  • 何欣,《ΣΔAD转换器改进及后端设计》,2006
  • 靳文杰,《视频复接编解码器的VLSI设计及其应用》,2007
  • 崔蒙晓,《多标准音频编解码在DSP上的实现》,2008
  • 李秦华,《DSP评测方法研究》,2008
  • 贾迪,《用于DSP的双端口、多路可变L1数据高速缓存设计》,2008
  • 王增丽,《专用DSP环境下H.263算法编解码的实现》,2008
  • 陈晨,《用于四核DSP的高速缓存系统设计》,2010
  • 马国良,《通用多通道高性能DMA控制器的设计与实现》,2010
  • 刘源,《基于超长指令字的数字信号处理器内核设计与优化》,2010
  • 郭德源,《面向高性能DSP的工具软件研究》,2010


中文期刊

  • 张延军; 何虎; 周志雄; 孙义和. RFCC-VLIW:一种适用于超长指令字处理器的寄存器堆结构, 清华大学学报(自然科学版), 2008年 10期
  • 马立伟,孙义和,片上网络拓朴优化:在离散平面上布局与布线.《电子学报》2007年第35卷第5期
  • 周志雄,何虎,孙义和等. 一种用于分簇VLIW结构的二维力量引导簇调度算法.《清华大学学报(自然科学版)》,2008年 10期
  • 周志雄,何虎,孙义和等. 寄存器堆互连的VLIW结构的指令调度算法. 《计算机学报》, Chinese Journal of Computers, 2008年 01期
  • 杨旭,何虎,孙义和. 利用回溯重调度过程优化簇间数据交互. 《清华大学学报(自然科学版)》录用
  • 杨旭,何虎,孙义和. 分簇VLIW结构下利用数据依赖图优化调度的研究,《计算机学报》录用
  • 殷树娟,孙义和,《一种500MHZ高性能锁相环的设计》,2006年1月,电子器件,PP.158-162
  • 殷树娟,孙义和,《全数字工艺下16位精度低压低功耗Σ∆模数调制器设计》,《电子与信息学报》录用
  • 沈钲,何虎,张延军,孙义和 “CERCIS 一种视频信号编解码片上系统设计实现”,《清华大学学报(自然科学版)》录用
  • 郭德源,杨旭,何虎,“面向嵌入式实时操作系统的MPI实现”,《微电子学与计算机》,2011年第28卷第3期


英文期刊

  • Ma Liwei and Sun Yihe, On-chip-network Design Automation with Source Routing Switcheds, Tsinghua Science and Technology.
  • Ma Liwei and Sun Yihe, Object-Oriented System-on-Network-on-Chip Template and Implementation: H.263 Case Study, Tsinghua Science and Technology
  • Xu Yang,Hu He, Zhixiong Zhou, Yanjun Zhang,Yihe Sun. Heuristic on a Novel Power Management System Cooperating with Compiler. Journal of Low Power Electronics, Vol.3, 1-6, 2007
  • Xu Yang, Hu He, Yihe Sun. Data Dependence Graph Directed Scheduling for Clustered VLIW Architecture. Accepted by Tsinghua Science and Technology
  • Xu Yang, Hu He, Yihe Sun. A Novel Low Energy Scheduling Algorithm for Clustered VLIW Architectures. Accepted by Journal of Low Power Electronics
  • Shujuan Yin, Yihe Sun, “A 1V 82μW pseudo-two-stage Class-AB OTA with pure digital technology”, Accepted by Tsinghua Science and Technology
  • Zheng Shen, Hu He, Yanjun Zhang, Yihe Sun. “A Video Specific Instruction Set Architecture for ASIP design”VLSI Design,Volume 2007, Article ID 58431, 7 pages,doi:10.1155/2007/58431
  • Zheng Shen, Hu He, Xu Yang, Di Jia, Yihe Sun “Architecture Design of A Variable Length Instruction Set VLIW DSP” Tsinghua Science and Technology
  • Z. Li, C. Zhu, L. Shang, R. Dick, and Y. Sun, “Transaction-Aware Network-on-Chip Resource Reservation,” IEEE Computer Architecture Letters, vol. 7, no. 2, pp. 53-56, July-Dec. 2008


会议论文

  • Yanjun Zhang, Hu He, Yihe Sun. “A New Register File Access Architecture for Software Pipelining in VLIW processors”. Asia and South Pacific Design Automation Conference (ASPDAC), Jan. 2005
  • H. He, Z. Li, and Y. Sun, “Multiply-add fused float point unit with on-fly denormalized number processing,” in Proc. Midwest Symp. On Circuits and Systems Aug. 2005.
  • Honghe Tan, Yihe Sun, “Design of a Configurable System-on-Chip for Audio Application”, Conf. on ASIC, Oct. 2005
  • Z. Li, H. He, and Y. Sun, “Floating-point unit processing denormalized numbers,” in Proc. Int. Conf. on ASIC, Oct. 2005.
  • Yanjun Zhang, Hu He, Yihe Sun, et al., A Scaleable DSP System for ASIP Design. Asian Solid-State Circuits Conference 2006
  • Ma Liwei and Sun Yihe, On-chip-network evolution using NetC, IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test 2005,p.249-252
  • Zhixiong Zhou, Hu He, Yihe Sun, et al. A retargetable compiler of VLIW ASIP for media signal processing, Proceedings of 2006 International Conference on Embedded Systems & Applications, 2006, 7: 46-49
  • Zhixiong Zhou, Hu He, Yihe Sun, et al. A 2-dimension force-directed scheduling algorithm for register-file-connectivity VLIW architecture, Proceedings of 18th IEEE Conference on ASAP (Application-specific System, Architecture and Processor). 2007, 7: 371-376.
  • Shujuan Yin, Yihe Sun, “Full compensated depletion-mode MOS-capacitor for pure digital technology low voltage switched-capacitor applications”, EDSSC2007,PP. 913-916.
  • Zheng Shen, Hu He, Yanjun Zhang, Yihe Sun, “VS-ISA: A video specific instruction set architecture for ASIP design”, Proceedings - 2006 International Conference on Intelligent Information Hiding and Multimedia Signal Processing, IIH-MSP 2006, Pasadena, CA, United State, Dec 18-20 2006, p 587-590
  • Zheng Shen, Hu He, Yihe Sun “Simultaneous Multithreading VLIW DSP Architecture with Dynamic Dispatch Mechanism” 12th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools Patras, Greece, 27-29 August, 2009
  • Z. Li, D. Fay, A. Mickelson, L. Shang, M. Vachhara jani, D. Filipovic, W. Park, and Y. Sun, “ Spectrum: A Hybrid Nanophotonic–Electric On-Chip Network ,” in Proc. Design Automated Conf., Jul. 2009
  • Z. Li, J. Wu, L. Shang, R. Dick, and Y. Sun,“Latency criticality aware on-chip communication,” in Proc. Design, Automation & Test in Europe Conf. , Apr. 2009
  • Yuan Liu; Hu He; Teng Xu; "Architecture design of variable lengths instructions expansion for VLIW", ASIC, 2009. ASICON '09. IEEE 8th International Conference on, 20-23 Oct. 2009 Page(s):29 - 32
  • Chen Chen; Hu He; Yuan Liu, "A design of level interface for CMP based Cache system", ASIC, 2009. ASICON '09. IEEE 8th International Conference on, 20-23 Oct. 2009 Page(s):839 - 842
  • Mengjun Sun; Zheng Shen; Hu He, "An efficient parallel instruction execution method for VLIW DSP", ASIC, 2009. ASICON '09. IEEE 8th International Conference on, 20-23 Oct. 2009 Page(s):75 - 78
  • Guoliang Ma; Hu He, "Design and implementation of an advanced DMA controller on AMBA-based SoC", ASIC, 2009. ASICON '09. IEEE 8th International Conference on, 20-23 Oct. 2009 Page(s):419 - 422