Yuan Liu：修订间差异
无编辑摘要 |
无编辑摘要 |
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From 2012.07 to now, I am working in the DSP Lab in Tsinghua as an assistant engineer. My main work currently is to lead a group of seven engineers to explore the interconnect architecture of a radar computer system, which is a co-project with CETC. | From 2012.07 to now, I am working in the DSP Lab in Tsinghua as an assistant engineer. My main work currently is to lead a group of seven engineers to explore the interconnect architecture of a radar computer system, which is a co-project with CETC. | ||
== Education == | == Education == | ||
* M.S. Institute of Microelectronics, Tsinghua University, 2010 | * M.S. Institute of Microelectronics, Tsinghua University, 2010 | ||
* B.S. School of Life Science and Technology, Xi’an Jiaotong University, 2007 | * B.S. School of Life Science and Technology, Xi’an Jiaotong University, 2007 | ||
== Research Interests == | == Research Interests == | ||
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* Electronic System Level modeling and simulation of Computer System | * Electronic System Level modeling and simulation of Computer System | ||
* Multi-core SoC | * Multi-core SoC | ||
== Publications == | == Publications == | ||
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# Yuan Liu, Deyuan Guo, Junping Ma, Qun Yang, Hu He, “Security Mechanisms for Real-time High-definition Multimedia Surveillance System,” plan to be published. | # Yuan Liu, Deyuan Guo, Junping Ma, Qun Yang, Hu He, “Security Mechanisms for Real-time High-definition Multimedia Surveillance System,” plan to be published. | ||
# He Hu, Liu Yuan, Patent, “Methodology of Finish Multipliers, Adders and Shifters in Microprocessors”, SIPO ZL200910090204.8. | # He Hu, Liu Yuan, Patent, “Methodology of Finish Multipliers, Adders and Shifters in Microprocessors”, SIPO ZL200910090204.8. | ||
== Contacts == | == Contacts == | ||
2012年11月12日 (一) 08:47的版本
Biography
In Sep 2007, I became a member of Tsinghua University DSP Laboratory under direction of Dr. He. I participated in the project of configurable VLIW DSP and another project of a VLIW GPDSP during the three years from 2007.09 to 2010.07. Subsequently, in August 2010, I was recruited by Vimicro Corporation, which is a tier one IC chip design house in China, and is the first one that successfully went public in NASDAQ among all Chinese IC companies. During the period of 2010.08 to 2012.05, I have taken part in the project of Real-time High-definition Multimedia Surveillance System, and my responsibility was to independently design an encrypt DSP processor.
From 2012.07 to now, I am working in the DSP Lab in Tsinghua as an assistant engineer. My main work currently is to lead a group of seven engineers to explore the interconnect architecture of a radar computer system, which is a co-project with CETC.
Education
- M.S. Institute of Microelectronics, Tsinghua University, 2010
- B.S. School of Life Science and Technology, Xi’an Jiaotong University, 2007
Research Interests
- Computer Architecture
- Dedicated processors
- Electronic System Level modeling and simulation of Computer System
- Multi-core SoC
Publications
- Yuan Liu, Hu He, Teng Xu, "Architecture design of variable lengths instructions expansion for VLIW," ASIC, 2009. ASICON '09. IEEE 8th International Conference on, 20-23 Oct. 2009 Page(s):29 – 32
- Yuan Liu, Deyuan Guo, Junping Ma, Qun Yang, Hu He, “Security Mechanisms for Real-time High-definition Multimedia Surveillance System,” plan to be published.
- He Hu, Liu Yuan, Patent, “Methodology of Finish Multipliers, Adders and Shifters in Microprocessors”, SIPO ZL200910090204.8.
Contacts
Address: Dongzhulou 9 District, Tsinghua University, Haidian District, Beijing, P.R. China
Postal code: 100084
Email: liuyuan07@tsinghua.org.cn
