查看“︁Deyuan Guo”︁的源代码

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[[File:Deyuan.jpg|200px|thumb|right|Deyuan Guo]]
郭德源 － GUO, Deyuan


== BIOGRAPHY ==
* 07/2010 - Present: Engineer at DSP laboratory, Institute of Microelectronics, Tsinghua University.
* 09/2007 - 07/2010: Master candidate at DSP laboratory, Institute of Microelectronics, Tsinghua University.


Deyuan Guo is studying and working under the guidance of Prof. Hu He in the DSP Laboratory, Institute of Microelectronics, Tsinghua University.


During these years, he has done many research on system software, such as open64 compiler, gem5 simulator, binutils, gdb, newlib, MPI, operation system, etc., which are essential to the VLIW processors. He has retargeted and ported the software toolchain to several different processors and optimized them. Also he has integrated the software tools together and did a number of integration testing, contributing significantly to the maturation of the processors.


Besides, he has been working on the hardware design of VLIW processors, e.g. the processor architecture optimization, the ISA optimization, the OS supporting, etc., and applied for some hardware patents.


Recently, he is researching on a project of VLIW/RISC Processor Automation Design and Evaluation System.


== EDUCATION ==
* M.E. Integrated Circuit Engineering, Tsinghua University, 2010.
* B.E. Aerocraft Design & Engineering, Beijing Institute of Technology, 2006.


== RESEARCH INTERESTS ==
* Computer Architecture
* Compiler, Simulator, and other system software
* Operating System
* Parallel Computing


== PUBLICATIONS AND PATENTS ==
# Deyuan Guo, Hu He. "VLIW DSPs, MIPS Supporting, and Eclipse Integration," The First Annual gem5 User Workshop, 2012.
# Deyuan Guo, Xu Yang, Hu He. "Porting MIPCH2 to VxWorks System Based on Socket with RTP Support," The 4th International Conference on Computer Science and Information Technology, 10-12 June 2011, p630-634.
# Xu Yang, Zhizhong Tang, Deyuan Guo, Hu He. "Backtracking Optimized DDG Directed Scheduling Algorithm for Clustered VLIW Architectures," Future Computer Sciences and Application (ICFCSA), 2011 International Conference on, 18-19 June 2011, p82-85. (IEEE)
# Wenxuan Yin, Xiang Gao, Xiaojing Zhu, Deyuan Guo. "An Efficient Shared Memory Based Virtual Communication System for Embedded SMP Cluster," Networking, Architecture and Storage (NAS), 2011 6th IEEE International Conference on, 28-30 July 2011, p288-294. (IEEE)
# Xu Yang, Deyuan Guo, Hu He, Zhizhong Tang. "Scheduling Technology Research for Clustered VLIW Architecture," The 3rd International Conference on Computer and Electrical Engineering, 2010, p326-330.
# Daoling Zhang, Wu Bai, Deyuan Guo, Xu Yang, Hu He. "A Very Long Instruction Word Processor," The 4th International Conference on Computer Science and Information Technology, 10-12 June 2011, p306-309.
# Wu Bai, Daoling Zhang, Deyuan Guo, Xu Yang, Hu He. "A M5 Based Cycle-Approximate Simulator for the VLIW Architecture Processors," The 4th International Conference on Computer Science and Information Technology, 10-12 June 2011, p504-507.
# Deyuan Guo, Xu Yang, Hu He. "An MPI Implementation for Embeded Real Time Operation System," Journal of Microelectronics & Computer, 2011, 28(3), p35-38. (Chinese).
# Wenxuan Yin, Xiang Gao, Xiaojing Zhu, Deyuan Guo. "Shared Memory Based Embedded Cluster Model with High Scalability," Journal of Computer Research and Development, 2012, 49(z1), p245-251. (Chinese).
# Dalin Zhu, Deyuan Guo, Hu He. "A Rapid Implementation Method of a Cycle Accurate Simulator for VLIW DSP," Journal of Conputer Engineering and Design, 2012. (Chinese).
# Minchao Chen, Xiaotian Li, Deyuan Guo, Hu He. "Design of a Simulator for HR-1 DSP," Journal of Computer Applications and Software, 2012. (Chinese).
# Hu He, Daoling Zhang, Xu Yang, Deyuan Guo. Patent Pending, "A Processor Structure for Storing the Execution Results of Instructions," State Intellectual Property Office of P.R.C. 201110001881.5.
# Deyuan Guo, Hu He. Patent Pending, "An Implementation Method of Variable Length VLIW Instructions in a Processor," State Intellectual Property Office of P.R.C. 201210076708.6.
# Deyuan Guo, Xu Yang, Hu He. Patent Pending, "A Processor Architecture of Combining the In Order and the VLIW Instruction Execution Method," State Intellectual Property Office of P.R.C. 201210279663.2.


== CONTACTS ==
Address: Room 109, District 9, East Main Building, Institute of Microelectronics, Tsinghua University, Beijing 100084, P.R.China

Email: [mailto:guodeyuan@tsinghua.edu.cn guodeyuan@tsinghua.edu.cn]